Memory Mapping of 8051
Note: 2^n=number of memory locations n = number of address lines
Some of the RAM IC's are given as:
Some of the ROM IC's are given as:

Q. Design a minimum system to interface the following specification:
1. 32kB of RAM using 2 x 16kB RAM IC
2. 32kB of ROM using 2 x 16kB ROM IC

Interfacing Diagram
There are two type of interfacing:1. Partial decoding: In this type of decoding not all the address lines are utilized in the circuit (they are left as unused pins). Ex: In an interface of 4kB memory only A0-A11 address lines are utilized, whereas the remaining A12-A15 address lines are unused.
2. Complete decoding (exhaustive decoding): In this type of decoding, all the address lines are utilized in circuit for some or the other use (i.e. all pins are exhausted). Ex: In an interface of 4kB memory only A0-A11 address lines are utilized, whereas the remaining A12-A15 address lines are used in Memory selection logic or as any other control signals.

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